Chapter 6: Virtual Memory — The Memory Illusion

Vol 3: Computer Core Expedition · Chapter 6

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Metadata Card

Attribute	Value
Difficulty	(Advanced)
Prerequisites	Cache hierarchy (Chapter 5)
Keywords	Page Table, TLB, Paging, Address Translation, MMU, Page Fault

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Your Progress

"Physical memory is never enough. The operating system uses page tables to give each process the illusion of infinite memory. Address translation, TLB, page faults, memory-mapped files — this is the core of OS memory management."

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Encounter 1: Why Virtual Memory?

1. Isolation: Each process gets its own address space
2. Simplification: Programs don't need to coordinate physical memory
3. Efficiency: Pages can be swapped to disk (demand paging)

Encounter 2: Page Tables and Translation

Virtual Address → [Page Table] → Physical Address
Virtual Address = VPN (virtual page number) + offset

Multi-level page tables save space (only allocate for used virtual address ranges).

Encounter 3: TLB (Translation Lookaside Buffer)

A hardware cache for page table entries. Without the TLB, every memory access would require two memory accesses (one for page table, one for the actual data).

Encounter 4: Page Faults

When a page is not in physical memory:

1. Hardware trap to OS
2. OS selects a victim page (evict if dirty)
3. OS loads the required page from disk
4. Page table updated, process resumes

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Verification Checklist

• [ ] Can explain why we need virtual memory
• [ ] Can describe the address translation process (VPN → page table → physical address)
• [ ] Can explain the role of the TLB
• [ ] Can describe the page fault handling sequence

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Traveler's Notes

• Virtual memory gives every process "infinite memory" by moving data between RAM and disk
• The page table is a mapping table; the TLB is its hardware cache
• Page faults are expensive (disk I/O) — minimize them with good locality

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Chapter 7: Exceptions and System Calls — The Boundary of User Mode